This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 2000-395723, filed Dec. 26, 2000, the entire contents of which are incorporated herein by reference.
The present invention relates to a magnetic random access memory (Magnetic RAM) and, more particularly, to a sense amplifier for amplifying the data in a memory cell.
As researchers have recently found that an MTJ (Magnetic Tunnel Junction) has a high MR (Magneto-Resistive) ratio at room temperature, the implementation of an MRAM to which a TMR (Tunneling Magneto-Resistive) effect is applied seems to be feasible.
Before the application of the TMR effect to an MRAM, an MRAM to which a GMR (Giant Magneto-Resistance) effect is applied has been known. However, the MR ratio of an MRAM to which the GMR effect is applied is several % to about 10%. In addition, in the MRAM to which the GMR effect is applied, a current flows in a thin metal film having a low resistance, as a result, the signal level is as low as several mV.
The MRAM to which the GMR effect is applied uses a technique of canceling out variations in characteristics among a plurality of magneto-resistance elements (memory cells) to prevent a data read error due to very low signal level. Conventionally, for example, a data read operation is performed twice with respect to a single memory cell to prevent the effect of variation in characteristics among magneto-resistance elements. It is therefore difficult to realize high-speed read operation in the MRAM to which the GMR effect is applied.
When a memory cell is comprised of a magneto-resistance element and a MOS transistor, if the ON resistance of the MOS transistor is not sufficiently low, data cannot be accurately read out due to variations in the characteristics of MOS transistors.
In order to prevent such a phenomenon, the ON resistance of the MOS transistor must be decreased to a value almost equal to that of the GMR element. To decrease the ON resistance of the MOS transistor, however, the MOS transistor needs to have a considerably large size. For this purpose, the size of the MOS transistor must be considerably increased. That is, to accurately perform read operation, the size of the MOS transistor serving as a transfer gate must be increased, resulting in an increase in memory cell size. This makes it difficult to realize a large memory capacity.
As described above, serious problems are posed in a GMR and MRAM in realizing a high-speed memory operation and a large memory capacity. For this reason, the GMR and MRAM are used only under special environments, e.g., in space and nuclear reactor, owing to their characteristic feature, i.e., having excellent radiation tolerance, but are not generally used much.
Consider an MRAM using the TMR effect again. The basic structure of a TMR element is the MTJ structure in which an insulating film is sandwiched between two ferromagnetic layers. The TMR element changes in resistance depending on whether the magnetization directions of the two ferromagnetic layers are parallel (in the same direction) or anti-parallel (in opposite directions). It is generally assumed that this change is based on the spin dependence of tunneling probability.
Binary data is stored depending on whether the magnetization directions of the ferromagnetic layers of the TMR element are parallel or anti-parallel. In addition, cell data are read out by using a change in the resistance of the TMR element which depends on the magnetization directions of the two ferromagnetic layers.
The MR ratio of an MRAM using the TMR effect is several ten %, and a resistance value for the TMR element can be selected from a wide range of resistance values by changing the thickness of the insulating layer (tunnel insulating film) sandwiched between the two magnetic layers. In addition, in the MRAM using the TMR effect, the signal level in read operation may become equal to or more than the signal level in the DRAM.
In the MRAM using the TMR effect, a write operation is performed by changing the magnetization direction of the TMR element (making it parallel or anti-parallel) using the magnetic field generated by currents flowing in two lines (line word line and bit line) perpendicular to each other.
More specifically, if the two ferromagnetic layers are made to have different thicknesses to set a difference between the coercive forces of the two magnetic layers, the relative directions of magnetization of the two ferromagnetic layers can be made parallel or anti-parallel by arbitrarily reversing only the magnetization of the thinner magnetic layer (having lower coercive force). In addition, if a diamagnetic layer is added to one of the two ferromagnetic layers, and the magnetization direction of the magnetic layer to which the diamagnetic layer is added is fixed by exchange coupling, the relative directions of magnetization of the two ferromagnetic layers can be made parallel or anti-parallel by arbitrarily reversing only the magnetization of the magnetic layer to which the diamagnetic layer is not added.
A magnetic layer has the following property. Assume that the magnetization of the magnetic layer is to be reversed by applying a magnetic field in a direction opposite to the magnetization direction of the magnetic layer. In this case, if a magnetic field is applied in advance in a direction perpendicular to the magnetization direction, the magnitude of magnetic field (reversing magnetic field) required to reverse the magnetization of the magnetic layer can be reduced.
By using two lines perpendicular to each other and applying magnetic fields in two directions perpendicular to each other, only the magnetization of the memory cell at the intersection of the lines can be selectively reversed.
Several candidates for a memory cell arrangement using a TMR element are conceivable. For example, a memory cell having a combination of a TMR element and a MOS transistor, like the one shown in FIG. 1, and a memory cell having a combination of a TMR element and a diode, like the one shown in FIG. 2, are regarded as most promising candidates. Referring to FIGS. 1 and 2, a TMR element is shown as a resistive element.
To read out data from a TMR element (memory cell), a current must be supplied to the TMR element or a voltage must be applied to it to convert data (the magnetization direction of the TMR element) into a current or voltage.
If, for example, a constant current is supplied as a sense current to the TMR element (memory cell), the potential of the bit line connected to the TMR element changes depending on the data (magnetization direction) stored in the TMR element. That is, the resistance of the TMR element becomes higher when the magnetization direction is anti-parallel than when the magnetization direction is parallel. Therefore, the potential of the bit line becomes higher when the magnetization direction is parallel than when the magnetization direction is anti-parallel.
In the following description, assume that the high resistance state of the TMR element is the state in which xe2x80x9c1xe2x80x9d is stored in the memory cell, and the low resistance state of the TMR element is the state in which xe2x80x9c0xe2x80x9d is stored in the memory cell.
The prior MRAM usually comprises 2-transistors and 2-MTJ cells (2-Tr+2-MTJ). In this case, 1-bit data is stored in two memory cells. To store 1-bit data, a memory cell to store the data and a memory cell to store data having an inverted value of the value of the stored data, i.e., a total of two memory cells, are required. In addition, since complementary data are stored in the two memory cells, a read signal can be automatically detected by the differential sense scheme. In addition, the signal level becomes twice that in a case wherein data is stored in only one memory cell.
In data read operation, the potential of the bit line is changed in accordance with the data stored in the memory cell, and this potential change must be amplified. A change in the potential of the bit line may be detected as follows. For example, two bit lines may be prepared. The data in the memory cell is then read out to one bit line, and inverted data of the data in the memory cell may be read out to the other bit line.
Furthermore, as two memory cells in which complementary data are stored are arranged close to each other, even variations in characteristics among memory cells (TRM elements) raise no serial problem. For this reason, in the development of current MRAMs, the scheme of storing 1-bit data as complementary data in two memory cells is often used.
In the scheme of storing 1-bit data using two memory cells, however, the memory cell area per bit becomes twice as large as that in the scheme of storing 1-bit data in one memory cell. That is, the scheme of storing 1-bit data by using two memory cells is not suitable for the implementation of large memory capacity.
In commercialization, therefore, there are strong demands for a memory with specifications stating that 1-bit data is stored in one memory cell comprised of one magneto-resistance element and one switch element upon attaining an increase in signal level by developing a material for magnetic layers.
In order to store 1-bit data in one memory cell constituted by one magneto-resistance element and one switch element and accurately read out data from this one memory cell, a special read circuit is required. Currently, however, such read circuits have not be fully studied, sophisticated, and converged unlike DRAMs.
In the case of MRAMS, in particular, a reference potential in sense operation cannot be automatically generated.
As the simplest technique of generating a reference potential, a technique of using a fixed potential as a reference potential is available. In this case, however, the potential difference between a read potential (xe2x80x9c0xe2x80x9d or xe2x80x9c1xe2x80x9d) and a reference potential varies due to the timing at which sensing starts. As a consequence, data cannot be correctly sensed in a wide range of operation conditions.
A magnetic random access memory according to an aspect of the present invention comprises a memory cell having a magneto-resistance element which is constituted by a plurality of magnetic layers isolated from each other by an insulating layer and from which two resistance values corresponding to the magnetization states of the plurality of magnetic layers can be obtained, a bit line connected to the memory cell, a sense current source for supplying a sense current to the bit line and the memory cell, a sense amplifier for comparing the potential of the bit line with a reference potential when a sense current flows in the bit line and the memory cell, and detecting data in the memory cell, and a bias voltage generating circuit having a reference cell for generating a reference potential. The reference cell has a resistance value intermediate between the two resistance values of the magneto-resistance element.